ZYNQ 7020 Minimum System Development Board
1. Main chip ZYNQ upgraded to 7020 (brand new industrial grade)
2. 512MB DDR3 (4Gbit)
3. TF card slot (responsible for TF startup)
4. 128Mbit (16MB) QSPIFLASH (can be responsible for startup)
5. One EEPROM 2KB (PL)
6. Two way LED lights (PL)
7. Two buttons (PL)+one control system POR reset button
8. One UART (connected to PL) TYPE C interface
9. 68 GPIO channels (all of which are PL terminals) (34 groups) are connected by differential lines in pairs, with equal lengths inside the differential lines
10. The BANK on one side is independently powered and the BANK voltage can be adjusted through a resistor
11. Gigabit Ethernet (connected to PL end)
12. HDMI output interface
13. PL connected 50M active crystal oscillator
14. Hdmi and USB are both connected with ESD electrostatic protection devices
15. Without downloader, an external Xilinx downloader is required
